DSPIC30F1010-30I/SP【PDF 12/66 页】IC DSPIC MCU/DSP 6K 28DIP

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dsPIC30F Flash Programming Specification

DS70102K-page 2

2010 Microchip Technology Inc.

2.2

Pins Used During Programming

The pins identified in Table 2-1 are used for device

programming. Refer to the appropriate device data

sheet for complete pin descriptions.

TABLE 2-1:

dsPIC30F PIN DESCRIPTIONS

DURING PROGRAMMING

Pin Name

Pin Type

Pin Description

MCLR/VPP

Programming Enable

VDD

Power Supply

VSS

Ground

PGC

Serial Clock

PGD

I/O

Serial Data

2.3

Program Memory Map

The program memory space extends from 0x0 to

0xFFFFFE. Code storage is located at the base of the

memory map and supports up to 144 Kbytes (48K

instruction words). Code is stored in three, 48 Kbyte

memory panels that reside on-chip. Table 2-2 shows

the location and program memory size of each device.

Locations 0x800000 through 0x8005BE are reserved

for executive code memory. This region stores either

the programming executive or debugging executive.

The programming executive is used for device

programming, while the debug executive is used for in-

circuit debugging. This region of memory cannot be

used to store user code.

Locations 0xF80000 through 0xF8000E are reserved

for the Configuration registers. The bits in these

registers may be set to select various device options,

and are described in Section 5.7 “Configuration Bits

Programming”.

Locations 0xFF0000 and 0xFF0002 are reserved for

the Device ID registers. These bits can be used by the

programmer to identify what device type is being

programmed and are described in Section 10.0

“Device ID”. The device ID reads out normally, even

after code protection is applied.

Figure 2-2 illustrates the memory map for the

dsPIC30F devices.

2.4

Data EEPROM Memory

The Data EEPROM array supports up to 4 Kbytes of

data and is located in one memory panel. It is mapped

in program memory space, residing at the end of User

Memory Space (see Figure 2-2). Table 2-2 shows the

location and size of data EEPROM in each device.

TABLE 2-2:

CODE MEMORY AND DATA EEPROM MAP AND SIZE

Device

Code Memory map

(Size in Instruction Words)

Data EEPROM Memory Map

(Size in Bytes)

dsPIC30F2010

0x000000-0x001FFE (4K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F2011

0x000000-0x001FFE (4K)

None (0K)

dsPIC30F2012

0x000000-0x001FFE (4K)

None (0K)

dsPIC30F3010

0x000000-0x003FFE (8K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F3011

0x000000-0x003FFE (8K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F3012

0x000000-0x003FFE (8K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F3013

0x000000-0x003FFE (8K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F3014

0x000000-0x003FFE (8K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F4011

0x000000-0x007FFE (16K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F4012

0x000000-0x007FFE (16K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F4013

0x000000-0x007FFE (16K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F5011

0x000000-0x00AFFE (22K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F5013

0x000000-0x00AFFE (22K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F5015

0x000000-0x00AFFE (22K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F5016

0x000000-0x00AFFE (22K)

0x7FFC00-0x7FFFFE (1K)

dsPIC30F6010

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFE (4K)

dsPIC30F6010A

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFF (4K)

dsPIC30F6011

0x000000-0x015FFE (44K)

0x7FF800-0x7FFFFE (2K)

dsPIC30F6011A

0x000000-0x015FFE (44K)

0x7FF800-0x7FFFFE (2K)

dsPIC30F6012

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFE (4K)

dsPIC30F6012A

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFE (4K)

dsPIC30F6013

0x000000-0x015FFE (44K)

0x7FF800-0x7FFFFE (2K)

dsPIC30F6013A

0x000000-0x015FFE (44K)

0x7FF800-0x7FFFFE (2K)

dsPIC30F6014

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFE (4K)

dsPIC30F6014A

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFE (4K)

dsPIC30F6015

0x000000-0x017FFE (48K)

0x7FF000-0x7FFFFE (4K)

Legend: I = Input, O = Output, P = Power

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